Cryptanalysis of data encryption standard/triple data encryption standard on a Java card

Abstract

Cryptographically embedded devices are vulnerable to Side Channel Attacks. Side channel attack is based upon the principle that the attacker extract leaked information from the physical implementation of the cryptosystem while it is performing cryptographic operations. Therefore, Advanced Encryption Standard (AES) has been implemented on cryptographic devices to protect classified information of individuals. AES encrypts the information into a decryptable format where a secret key is needed to convert the data back to its original form. In this research, the vulnerability of 128-bit AES cryptographic algorithm implementation in a microcontroller and FPGA devices against Differential Power Analysis (DPA) attacks was investigated. The same implementation of the AES algorithm was programmed into the microcontroller and FPGA and power analysis attacks were performed on both devices. We observed and measured the behaviour of the power consumption of the two target devices while they were encrypting 1000 randomly generated plaintexts using the same secret key throughout. Data were collected using two distinctive measurements setups for each target device. Some 1000 power consumption measurements each having 1500 samples for each target were collected. Pearson's correlation coefficient statistical method was used to measure the dependency between the hypothetical power consumption measurement and the measured power consumption. The hamming distance power model was used to predict the power consumed by the target devices at various points during the execution of cryptographic operations. The target device's security gets compromised if the power waveforms obtained correlate with those from hamming distance hypothetical power consumption model of the device. Our attack was successful in revealing all the 16 bytes (128-bit) of the secret key for both implementations. For microcontroller target, a minimum of 618 power measurements were required for the attack to be successful and for FPGA target, a minimum of 100 power measurements were needed. Our attack method took an average of almost three hours for each target to recover the full length of the key. Based on our results, it's evident that DPA is a serious threat against realizations of AES on microcontrollers and FPGAs. Also, it was clear that such attacks are possible and can be realized in practice. The implication of the results is that AES is weak against DPA as the full length key can be recovered and access to sensitive information on cryptographic devices can be gained in few hours.